BitBLT Graphics Engine Features
Bit Block Transfer – 3 Independent Memory Sources of data:
On-Screen & Off-Screen Data Block (SRC)
Off-Screen Fixed Pattern Data Block (PTN)
On-Screen visible Data Block (DST)
Raster Operations (ROP) performed on Block Transfers:
256 Raster Operations
ROP0, ROP1, ROP2, & ROP3 operations
Includes industries most popular 16 ROPs
BitBLT Draw Features:
Pixels, Horizontal & Vertical Lines
Overlapping & Non-Overlapping Block Transfers
Solid Color Block Fills
FONT Monochrome Bitmap to Color Expansion, either Transparent or
Opaque
Rotation Block Transfers: 0, 90, 180, 270 degrees
Block Stretch on X & Y Axis
Alpha Blending
Sprite Moves
2D Graphics Rendering Engine (Option):
Pixel Drawing
Line (Vector) Drawing – any direction
Polygon Rendering
Filled Polygon Command FIFO or Link-List Display Processing Unit:
Simplifies Processor Interface
Minimizes Processor Overhead
Frame Buffer & Display Features Supported:
Display Resolutions 4K x 4K
4 GB Memory Range
8, 16 , 24, & 32 bits-per-pixel color depths
Interrupt Controller with 3 sources of internal interrupts with masking control
On-Chip Interconnect Compliance – Avalon, AXI, AXI4, AHB:
AMBA AXI Protocol Specification (V1.0)
AMBA AXI4 Protocol Specification (V3.0)
AMBA AHB Specification 2.0
FPGA Integration Support:
Altera Quartus II & SOPC Integration & NIOS II EDS Reference Design
Xilinx ISE Design Suite & Embedded Development & Software Development Kits
Raster Graphics 2D GPUs: GC200, GC300
- BitBlt, rectangle fill, line, StretchBlt, and monochrome expansion support
- ROP2, ROP3, ROP4 (transparency) support
- Full alpha blending support
- High-quality 9-tap filter for scaling
- YUV-to-RGB conversion and 8-bit color lookup
- 90°,180°, 270° rotation on every primitive
- Full asynchronous operation through DMA command stream
- Support for clipping rectangle
- Supports up to 255 rectangles per primitive call
- Simple programming interface
- Very low CPU overhead – no need to wait until 2D engine is finished before changing states or issuing new commands
- Allows batching of commands to further reduce CPU overhead (begin/end paradigm)
- High-quality image and video scalar
- Filter kernel size is programmable from 1×1 to 9×9
- Vertical and horizontal kernel sizes are independently programmable
- Filter coefficient can be programmed for any type of filter
- Supports 32 filter phases
- Programmable format conversion
- Supports 11 source formats
- Standard configuration supports 7 destination formats
- Display resolution HD 1080p
Vector 2D Engine
- Polygon Rasterizer
- Polygon Filling (odd-even, inside rules)
- Line Drawing (any direction, any width)
- Filled Boxes
- Modes: Non-Antialiased, AntiAliased 4,8,16,32 point multisampling
- Screen-aware subpixel antialiased Rendering
- Scissoring / Clipping
- Infinite Scissoring windows supported with no performance impact
- Pixel Blending
- Supports all OpenVG colour surface formats
- Alpha Blending
- Porter-Duff models
- Raster bitwise Operations
- Blitter
- High performance Blitter
- Colour Conversions on-the-fly
- Support for Alpha blending
- Support for Transparent colour value
- Paint Application
- Linear Fills
- Radial Fills
- Image Convolution Engine
- Raster convolution operations
- Matrix Colour Conversions
- Image Warping
- Texture Mapping
- Image Sizing
- Bilinear Filtering Image interpolations
- VGA/LCD Controller (optional)
- Supporting RGB888, RGB565, RGB555, RGB444, L8 and 8-bit pallette modes
- Configurable number of Hardware Sprites for Cursors.
- CMOS Camera i/f (optional)
- Direct Interfacing to external CMOS colour camera
- Bayer pattern interpolation
- Modular Design based in AMBA AHB interface for easy SoC Integration.
- pure technology indepedent Verilog RTL
- Synthesizable
- customizable to your target technology