Cache Controllers Projects

AMBA Cache Controllers
AMBA Cache Controllers Image
AMBA® Level-2 Cache Controllers are designed to boost performance of AMBA AHB and AXI processors while reducing overall traffic to system memory and therefore SoC energy consumption.
Overview
CPU to off-chip memory communication has become the performance bottleneck in many SoC.
Level 2 Cache Controllers improve CPU performance by keeping memory access on-chip with a typical latency 10-25% of accessing the data off-chip.  At the same time the reduced CPU demands on the off-chip memory bandwidth free up that resource for other masters.  Level 2 Cache Controllers also contribute significantly to power efficiency as on-chip accesses are typically an order of magnitude lower in power versus going off-chip.
AMBA Level 2 Cache Controllers can either be embedded in the CPU or delivered as standalone components.  In either case, they are designed alongside the CPU to match the processor’s requirements and easily integrate into AMBA AXI or AHB interconnects.